different driver
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sim/ZXGD3009DY.asy
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23
sim/ZXGD3009DY.asy
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Version 4
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SymbolType BLOCK
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RECTANGLE Normal -96 -55 96 56
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WINDOW 0 0 -56 Bottom 2
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WINDOW 3 0 56 Top 2
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SYMATTR Prefix X
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SYMATTR Value ZXGD3009DY
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SYMATTR ModelFile ZXGD3009DY.lib
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PIN -96 -32 LEFT 8
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PINATTR PinName VCC
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PINATTR SpiceOrder 1
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PIN -96 0 LEFT 8
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PINATTR PinName IN
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PINATTR SpiceOrder 2
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PIN -96 32 LEFT 8
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PINATTR PinName VEE
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PINATTR SpiceOrder 3
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PIN 96 -32 RIGHT 8
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PINATTR PinName SINK
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PINATTR SpiceOrder 4
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PIN 96 32 RIGHT 8
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PINATTR PinName SOURCE
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PINATTR SpiceOrder 6
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sim/ZXGD3009DY.lib
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sim/ZXGD3009DY.lib
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* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES")
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* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY
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* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY
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* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF
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* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED,
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* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM
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* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT,
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* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH
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* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY
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* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER
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* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES,
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* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM
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* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.
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*DIODES_INC_SPICE_MODEL
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*SIMULATOR=SIMETRIX
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*ORIGIN=DZSL_DPG_SU
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*DATE=29Jul2016
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*VERSION=1
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** PIN ORDER 1=Vcc 2=IN 3=Vee 4=SINK 5=NC 6=SOURCE
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.SUBCKT ZXGD3009DY 1 2 3 4 5 6
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Q1 10 2 60 N
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Q2 30 2 40 P
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L1 1 10 1p
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L2 3 30 1p
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L3 4 40 100p
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L4 6 60 100p
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.MODEL N NPN(IS=6E-14 BF=500 NF=.98 ISE=1E-14 NE=1.25 ISC=3.3E-14 BR=15 NR=1 NC=1.12 CJE=36.592p VJE=.75 MJE=.37 CJC=9.674p VJC=.5 MJC=.33 VAF=28 IKF=1 RC=.1 RE=.05 NK=.808)
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.MODEL P PNP IS=20e-14 NF=1 ISE=5e-15 NE=1.3 BF=350
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+ VAF=26 IKF=1 ISC=9e-15 NC=1.03 BR=15 NR=1 VAR=5.7 IKR=0.6 RE=0.067
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+ RB=0.33 RC=0.012 CJE=36.99e-12 VJE=0.75 MJE=0.41 CJC=13.96e-12 VJC=0.5
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+ MJC=0.33 TF=8e-10 TR=5.6e-9 QUASIMOD=1 RCO=0.66 GAMMA=1.3e-9 NK=.71
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+ XTB=1.5 TRE1=0.004 TRB1=0.003 TRC1=0.004
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.ENDS
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* (c) 2016 Diodes Inc
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*
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* The copyright in these models and the designs embodied belong
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* to Diodes Incorporated (" Zetex "). They are supplied
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* free of charge by Zetex for the purpose of research and design
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* and may be used or copied intact (including this notice) for
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* that purpose only. All other rights are reserved. The models
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* are believed accurate but no condition or warranty as to their
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* merchantability or fitness for purpose is given and no liability
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* in respect of any use is accepted by Diodes Incorporated, its distributors
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* or agents.
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*
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* Diodes Zetex Semiconductors Ltd, Zetex Technology Park, Chadderton,
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* Oldham, United Kingdom, OL9 9LL
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@ -6,8 +6,8 @@ WIRE -960 -560 -1168 -560
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WIRE -832 -560 -960 -560
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WIRE -384 -560 -832 -560
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WIRE 128 -560 -384 -560
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WIRE 272 -560 128 -560
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WIRE 528 -560 272 -560
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WIRE 240 -560 128 -560
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WIRE 528 -560 240 -560
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WIRE 752 -560 528 -560
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WIRE -1360 -544 -1360 -560
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WIRE -960 -544 -960 -560
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@ -22,23 +22,23 @@ WIRE -1600 -432 -1680 -432
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WIRE 528 -416 528 -448
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WIRE -1600 -400 -1600 -432
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WIRE -1680 -336 -1680 -432
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WIRE 272 -336 272 -560
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WIRE 288 -336 272 -336
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WIRE 480 -320 464 -320
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WIRE 240 -336 240 -560
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WIRE 256 -336 240 -336
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WIRE 464 -336 448 -336
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WIRE 752 -320 752 -560
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WIRE 128 -304 128 -432
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WIRE 288 -304 128 -304
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WIRE 480 -304 480 -320
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WIRE 256 -304 128 -304
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WIRE 464 -304 464 -336
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WIRE 528 -304 528 -352
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WIRE 528 -304 480 -304
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WIRE 528 -304 464 -304
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WIRE 672 -304 528 -304
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WIRE 704 -304 672 -304
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WIRE -1600 -288 -1600 -320
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WIRE 480 -288 480 -304
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WIRE 480 -288 464 -288
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WIRE 288 -272 272 -272
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WIRE 256 -272 240 -272
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WIRE 464 -272 464 -304
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WIRE 464 -272 448 -272
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WIRE -1680 -240 -1680 -272
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WIRE 272 -208 272 -272
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WIRE 240 -208 240 -272
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WIRE -1600 -112 -1600 -208
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WIRE -1600 -64 -1600 -112
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WIRE 128 -64 128 -304
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@ -82,7 +82,7 @@ FLAG 992 496 0
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FLAG -1680 -240 0
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FLAG 752 0 tip
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FLAG 672 -304 gate
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FLAG 272 -208 0
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FLAG 240 -208 0
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SYMBOL res 736 336 R0
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SYMATTR InstName R1
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SYMATTR Value {rtip}
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@ -169,13 +169,13 @@ WINDOW 0 24 64 Left 2
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WINDOW 3 24 0 Left 2
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SYMATTR InstName D2
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SYMATTR Value EDZV15B
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SYMBOL ZXGD3006 368 -304 R0
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SYMBOL ZXGD3009DY 352 -304 R0
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SYMATTR InstName U1
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TEXT -1656 -1016 Left 2 !.tran 30m
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TEXT -1648 -808 Left 2 !.param fsw=1k
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TEXT -1648 -808 Left 2 !.param fsw=3k
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TEXT -1648 -776 Left 2 !.param d={pout/(vbus*vbus/rtip)}
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TEXT -1648 -904 Left 2 !.param vbus=28
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TEXT -1648 -840 Left 2 !.param pout=130
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TEXT -1648 -872 Left 2 !.param rtip=2.5
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TEXT -1648 -936 Left 2 !.param vcc=3.3
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TEXT 312 -208 Left 2 !.lib ZXGD3006E6.lib
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TEXT 272 -208 Left 2 !.lib ZXGD3009DY.lib
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