From 30c0aa5cba112ce18ca016d04ddbcca1eab52d60 Mon Sep 17 00:00:00 2001 From: Alessandro Mauri Date: Sat, 28 Feb 2026 02:14:01 +0100 Subject: [PATCH] different capacitors in sim with pi filter --- sim/CGA5L1X7R1H106K160AC.asy | 16 +++ sim/CGA5L1X7R1H106K160AC_p.mod | 62 ++++++++ sim/pi_filter.asc | 254 ++++++++++++++++----------------- 3 files changed, 200 insertions(+), 132 deletions(-) create mode 100644 sim/CGA5L1X7R1H106K160AC.asy create mode 100644 sim/CGA5L1X7R1H106K160AC_p.mod diff --git a/sim/CGA5L1X7R1H106K160AC.asy b/sim/CGA5L1X7R1H106K160AC.asy new file mode 100644 index 0000000..e1b6200 --- /dev/null +++ b/sim/CGA5L1X7R1H106K160AC.asy @@ -0,0 +1,16 @@ +Version 4 +SymbolType BLOCK +LINE Normal 0 -4 0 -32 +LINE Normal 16 -4 0 -4 +LINE Normal -16 -4 0 -4 +LINE Normal 16 4 -16 4 +LINE Normal 0 32 0 4 +WINDOW 0 80 -16 Bottom 2 +WINDOW 3 80 16 Top 2 +SYMATTR Prefix X +SYMATTR Value CGA5L1X7R1H106K160AC_p +SYMATTR ModelFile CGA5L1X7R1H106K160AC_p.mod +PIN 0 -32 LEFT 8 +PINATTR SpiceOrder 1 +PIN 0 32 RIGHT 8 +PINATTR SpiceOrder 2 diff --git a/sim/CGA5L1X7R1H106K160AC_p.mod b/sim/CGA5L1X7R1H106K160AC_p.mod new file mode 100644 index 0000000..c4d84cc --- /dev/null +++ b/sim/CGA5L1X7R1H106K160AC_p.mod @@ -0,0 +1,62 @@ +*---------------------------------------------------------------------- +* SPICE Netlist Generated by TDK Corporation +* Copyright(C) 2022 TDK Corporation. +* All Rights Reserved. +*---------------------------------------------------------------------- +* TDK P/N: CGA5L1X7R1H106K160AC (Multilayer Ceramic Chip Capacitor) +* Property: C=10uF +* Size(LxWxT): 3.2x1.6x1.6mm +* Model Type: Precise Model +* Model Generated on June 16, 2022 +*---------------------------------------------------------------------- +* Terms and conditions regarding TDK Simulation Models: +* 1)This simulation model is being provided solely for informational +* purposes. Please refer to the specifications of the products in +* terms of detailed characteristics of such products. +* 2)In no event shall TDK Corporation of any of its subsidiaries be +* liable for any loss or damage arising, directly or indirectly, +* from any information contained in this simulation model, including, +* but not limited to loss or damages arising from any inaccuracies, +* omissions or errors in connection with such information. +* 3)Any and all copyrights on this simulation model are owned by +* TDK Corporation. Duplication or redistribution of this simulation +* model without prior written permission from TDK Corporation +* is prohibited. +* 4)This simulation model is subject to any modification or change +* without any prior notice. +* 5)Neither TDK Corporation nor any of its subsidiaries shall make any +* warranty, express or implied, including but not limited to the +* correctness, implied warranties of merchantability and fitness for +* a particular purpose with respect to this simulation models. +* 6)The use of this simulation model shall be deemed to have consented +* to the terms and conditions hereof. +*---------------------------------------------------------------------- +* External Node Assignments: +* +* n1 ---| |--- n2 +* +*---------------------------------------------------------------------- +* Applicable Conditions: +* Temperature = 25 degC +* DC Bias Voltage = 0 V +* Small Signal Operation +*---------------------------------------------------------------------- +.SUBCKT CGA5L1X7R1H106K160AC_p n1 n2 +C1 n1 11 9.52429487E-06 +C2 n1 12 1.15159657E-07 +C3 n1 13 1.15159657E-07 +C4 n1 14 1.15159657E-07 +C5 n1 15 1.15159657E-07 +C6 n1 16 1.15159657E-07 +C7 n1 17 1.15159657E-07 +L1 n2 21 7.50000000E-10 +R1 11 21 2.20400000E-03 +R2 11 12 1.30531029E+01 +R3 11 13 8.43347070E+01 +R4 11 14 5.44726342E+02 +R5 11 15 3.51748832E+03 +R6 11 16 2.27076345E+04 +R7 11 17 1.46554336E+05 +R8 n1 11 5.00000000E+07 +.ENDS CGA5L1X7R1H106K160AC_p +*---------------------------------------------------------------------- diff --git a/sim/pi_filter.asc b/sim/pi_filter.asc index 2fe71da..8ffa5c0 100644 --- a/sim/pi_filter.asc +++ b/sim/pi_filter.asc @@ -1,112 +1,108 @@ Version 4.1 -SHEET 1 1012 804 -WIRE 16 -720 -144 -720 -WIRE 384 -720 96 -720 +SHEET 1 1096 804 +WIRE -96 -720 -256 -720 +WIRE 272 -720 -16 -720 WIRE -1248 -560 -1600 -560 -WIRE -944 -560 -1168 -560 -WIRE -880 -560 -944 -560 -WIRE -800 -560 -880 -560 -WIRE -384 -560 -704 -560 -WIRE -272 -560 -384 -560 -WIRE -144 -560 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752 240 +WIRE 96 336 96 240 +WIRE 752 400 752 368 +WIRE 848 400 752 400 +WIRE 752 432 752 400 +WIRE 848 448 848 400 +WIRE 752 576 752 512 +WIRE 848 576 848 512 +FLAG 752 576 0 FLAG -1600 128 0 -FLAG 96 224 0 +FLAG 96 416 0 FLAG -1600 -560 vbus -FLAG -384 -560 vmid -FLAG -1008 -240 vcc -FLAG 848 384 0 +FLAG -928 -560 vmid +FLAG 848 576 0 FLAG -1680 -416 0 FLAG -1600 -112 vdrv FLAG -1728 128 0 -FLAG -784 -176 0 -FLAG -1008 -64 0 -FLAG 320 0 0 -FLAG 96 -80 cp -FLAG 96 0 0 -FLAG -272 -352 0 -FLAG 512 -352 0 -FLAG 608 -352 0 -FLAG -384 -352 0 -SYMBOL nmos 704 -208 R0 +FLAG 320 192 0 +FLAG 96 112 cp +FLAG 96 192 0 +FLAG -560 -448 0 +FLAG -624 -448 0 +FLAG -688 -448 0 +FLAG 608 -448 0 +FLAG 544 -448 0 +FLAG 480 -448 0 +FLAG 304 -560 vl2 +FLAG -320 -560 vl1 +SYMBOL nmos 704 -16 R0 SYMATTR InstName M1 SYMATTR Value AON7262E -SYMBOL res 736 224 R0 +SYMBOL res 736 416 R0 SYMATTR InstName R1 SYMATTR Value {rtip} -SYMBOL ind -16 -544 R270 +SYMBOL ind -128 -544 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 @@ -116,26 +112,20 @@ WINDOW 123 0 0 Left 0 WINDOW 39 24 44 Left 2 SYMATTR InstName V1 SYMATTR Value PWL(0 0 1m 0 1.1m {vbus} 10m {vbus} 10.1m 0) -SYMBOL voltage 96 128 R0 +SYMBOL voltage 96 320 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value PULSE(0 5 5m 100n 100n {d*1/fsw} {1/fsw} 200) -SYMBOL cap 640 -64 R0 +SYMBOL cap 640 128 R0 SYMATTR InstName C3 SYMATTR Value 100n -SYMBOL pmos -704 -512 M270 -SYMATTR InstName M2 -SYMATTR Value RRS090P03 -SYMBOL res -896 -528 R0 -SYMATTR InstName R3 -SYMATTR Value 1k SYMBOL res -1264 -544 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R2 SYMATTR Value 5m -SYMBOL cap 832 256 R0 +SYMBOL cap 832 448 R0 SYMATTR InstName C4 SYMATTR Value 10p SYMBOL ind -1616 -416 R0 @@ -154,71 +144,71 @@ SYMATTR Value 20m SYMBOL cap -1744 -16 R0 SYMATTR InstName C6 SYMATTR Value 10µ -SYMBOL cap 80 -448 R90 +SYMBOL cap -32 -448 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C7 SYMATTR Value 5p -SYMBOL res 352 -576 R90 +SYMBOL res 240 -576 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R11 -SYMATTR Value 20m -SYMBOL res 112 -736 R90 +SYMATTR Value 18.9m +SYMBOL res 0 -736 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R12 SYMATTR Value 10Meg -SYMBOL diode -928 -432 R180 -WINDOW 0 24 64 Left 2 -WINDOW 3 24 0 Left 2 -SYMATTR InstName D2 -SYMATTR Value UFZV15B -SYMBOL res -800 -400 R0 -SYMATTR InstName R4 -SYMATTR Value 1k -SYMBOL npn -848 -288 R0 -SYMATTR InstName Q1 -SYMATTR Value 2N2222 -SYMBOL res -864 -256 R90 -WINDOW 0 0 56 VBottom 2 -WINDOW 3 32 56 VTop 2 -SYMATTR InstName R5 -SYMATTR Value 1k -SYMBOL voltage -1008 -192 R0 -WINDOW 123 0 0 Left 0 -WINDOW 39 0 0 Left 0 -SYMATTR InstName V4 -SYMATTR Value {vcc} -SYMBOL IRS10752L 416 -48 R0 +SYMBOL IRS10752L 416 144 R0 WINDOW 3 2 120 Top 2 SYMATTR InstName U2 -SYMBOL schottky 240 -128 R270 +SYMBOL schottky 240 64 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D5 SYMATTR Value 1N5818 -SYMBOL voltage 96 -96 R0 +SYMBOL voltage 96 96 R0 SYMATTR InstName V2 SYMATTR Value 12 -SYMBOL ind 736 80 R0 +SYMBOL ind 736 272 R0 SYMATTR InstName L3 SYMATTR Value 10n SYMATTR SpiceLine Rser=1m -SYMBOL C3216X5R1V226M160AC_b -272 -416 R90 -SYMATTR InstName U4 -SYMBOL C3216X5R1V226M160AC_b 512 -416 R90 +SYMBOL CGA5L1X7R1H106K160AC -688 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 1 -82 Bottom 2 SYMATTR InstName U1 -SYMBOL Contrib\\CHEMI-CON\\Capacitors\\Alcap-SMD\\EMVY350ARA220MF55G -368 -464 M0 -SYMATTR InstName C1 -SYMBOL Contrib\\CHEMI-CON\\Capacitors\\Alcap-SMD\\EMVY350ARA220MF55G 592 -464 R0 -SYMATTR InstName C2 +SYMBOL CGA5L1X7R1H106K160AC -624 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 2 -114 Bottom 2 +SYMATTR InstName U3 +SYMBOL CGA5L1X7R1H106K160AC -560 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 4 -145 Bottom 2 +SYMATTR InstName U4 +SYMBOL CGA5L1X7R1H106K160AC 480 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 0 -84 Bottom 2 +SYMATTR InstName U5 +SYMBOL CGA5L1X7R1H106K160AC 544 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 1 -113 Bottom 2 +SYMATTR InstName U6 +SYMBOL CGA5L1X7R1H106K160AC 608 -496 R0 +WINDOW 0 44 -24 Bottom 2 +WINDOW 3 2 -144 Bottom 2 +SYMATTR InstName U7 +SYMBOL voltage -336 -560 R90 +WINDOW 0 -32 56 VBottom 2 +WINDOW 3 32 56 VTop 2 +SYMATTR InstName V4 +SYMATTR Value 0 TEXT -1656 -1016 Left 2 !.tran 30m -TEXT -80 -632 Left 2 !.param L=2.2u Is=7 +TEXT -192 -632 Left 2 !.param L=3.3u Is=8.2 TEXT -1648 -808 Left 2 !.param fsw=50k TEXT -1648 -776 Left 2 !.param d={pout/(vbus*vbus/rtip)} TEXT -1648 -904 Left 2 !.param vbus=28 TEXT -1648 -840 Left 2 !.param pout=130 TEXT -1648 -872 Left 2 !.param rtip=2.5 -TEXT 352 112 Left 2 !.lib IRS10752L.lib +TEXT 352 304 Left 2 !.lib IRS10752L.lib TEXT -1648 -936 Left 2 !.param vcc=3.3