4.4 KiB
RISC combined instruction set
goal: a semi-efficient insatruction set that offers few instructions that offer the combined functions of conventional risc instuctions.
as such most instructions could be pipelined, I don't know how to feel about that
Memory Operations
when accessing memory trough an address a consecutive pair of registers is used,
each consecutive pair of registers is given a name, for brevity a pair is
always referred to as A. The possible pairs are:
- A = R1:R0
- B = R3:R2
- C = R5:R4
- D = R7:R6
- E = R9:R8
- F = R11:R10
- G = R13:R12
- H = R15:R14
- I = R17:R16
- J = R19:R18
- K = R21:R20
- L = R23:R22
- M = R25:R24
- N = R27:R26
- O = R29:R28
- P = R31:R30
LD load value into register
post increment/decrement
syntax: LD Rd, A+q
action: Rd = [A]; A += q
pre increment/decrement
syntax: LD Rd, q+A
action: A += q; Rd = [A]
LDI load immediate into register
syntax: LDI Rd, imm
action: Rd = imm
LDIL load long immediate into register
syntax: LDIL Rd, imm32
action: Rd = imm32
ST store value from register
post increment/decrement
syntax: ST A+q, Rd
action: [A] = Rd; A += q
pre increment/decrement
syntax: ST q+A, Rd
action: A += q; [A] = Rd
STI store immediate into memory
post increment/decrement
syntax: STI A+q, imm
action: [A] = imm; A += q
pre increment/decrement
syntax: STI q+A, imm
action: A += q; [A] = imm
STIL store long immediate into memory
post increment/decrement
syntax: STIL A+q, imm32
action: [A] = imm32; A += q
pre increment/decrement
syntax: STIL q+A, imm32
action: A += q; [A] = imm32
Arithmetic operations
ADD
ADDC
ADDI
ADDIC
SUB Subtract
SUBC Subtract with carry
SUBI Subtract immediate
SBIC Subtract immediate with carry
MLA Multiply and add
syntax: MLA A, Ra, Rb, Rc
action: A = Rc + (Ra * Rb)
MLAI Multiply and add immediate
syntax: MLAI A, Ra, Rb, imm
action: A = imm + (Ra * Rb)
MLIA Multiply immediate and add
syntax: MLIA A, Ra, imm, Rc
action: A = Rc + (Ra * imm)
MLAC Multiply and add with carry
syntax: MLAC A, Ra, Rb, Rc
action: A = F.C + Rc + (Ra * Rb)
MLAIC Multiply and add immediate with carry
syntax: MLAIC A, Ra, Rb, imm
action: A = F.C + imm + (Ra * Rb)
MLIAC Multiply immediate and add with carry
syntax: MLIAC A, Ra, imm, Rc
action: A = F.C + Rc + (Ra * imm)
SMLA Signed multiply and add
syntax: SMLA A, Ra, Rb, Rc
action: A = Rc + (Ra * Rb)
SMLAI Signed multiply and add immediate
syntax: SMLAI A, Ra, Rb, imm
action: A = imm + (Ra * Rb)
SMLIA Signed multiply immediate and add
syntax: SMLIA A, Ra, imm, Rc
action: A = Rc + (Ra * imm)
SMLAC Signed multiply and add with carry
syntax: SMLAC A, Ra, Rb, Rc
action: A = F.C + Rc + (Ra * Rb)
SMLAIC Signed multiply and add immediate with carry
syntax: SMLAIC A, Ra, Rb, imm
action: A = F.C + imm + (Ra * Rb)
SMLIAC Signed multiply immediate and add with carry
syntax: SMLIAC A, Ra, imm, Rc
action: A = F.C + Rc + (Ra * imm)
MUL, MULS, IMUL, MULI, etc.
can be macro'd with multiply and adds
AND
ANDI with immediate
OR
ORI with immediate
XOR
XORI with immediate
NEG negate (two's complement)
ROR Rotate right
ROL Rotate left
SHR Shift right
SHRC Shift right through carry
SHL Shift left
SHLC Shift left through carry
Conditional operations
JZS Jump on zero set
syntax: JZS imm32
JZC Jump on zero clear
RJZS Relative jump on zero set
syntax: RJZS imm
RJZC Relative jump on zero clear
JNS Jump on negative set
JNC Jump on negative clear
RJNS Relative jump on negative set
RJNC Relative jump on negative clear
JCS Jump on carry set
JCC Jump on carry clear
RJCS Relative jump on carry set
RJCC Relative jump on carry clear
JVS Jump on overflow set
JVC Jump on overflow clear
RJVS Relative jump on overflow set
RJVC Relative jump on overflow clear
Stack manipulation
CALL
could be implemented with push/jump
RCALL
could be implemented with pop/jump
PUSH
POP
Planned to haves
- 1-cycle shift and add
- 1-cycle intger division
- floating point arithmetic
- interrupts
- atomic compare-and-swap
- atomic load-link/store-conditional
- memory management
- memory-mapped registers
- sine and cosine functions, see cordic