1
shifter.dig
Sub
Bits
16
And
Bits
16
wideShape
true
Or
Bits
16
wideShape
true
XOr
Bits
16
wideShape
true
In
Label
a
Bits
16
In
Label
b
Bits
16
multiply-add.dig
In
Label
c
Bits
16
Neg
Bits
16
Splitter
Input Splitting
16
Output Splitting
1*16
Splitter
Input Splitting
16
Output Splitting
1*16
NOr
wideShape
true
Inputs
16
NOr
wideShape
true
Inputs
16
Out
Label
LZ
Out
Label
Z
Splitter
Input Splitting
16
Output Splitting
15,1
Out
Label
N
Add
Bits
16
XOr
wideShape
true
Out
Label
V
Multiplexer
Bits
16
Selector Bits
3
Multiplexer
Selector Bits
3
Const
Value
0
Out
Label
u0
Bits
16
Out
Label
u1
Bits
16
Out
Label
C_o
Tunnel
NetName
s
Tunnel
NetName
s
In
Label
C_i
In
Label
Op
Bits
4
Splitter
rotation
Input Splitting
16
Output Splitting
15,1
Splitter
rotation
Input Splitting
16
Output Splitting
15,1
Tunnel
NetName
s
Splitter
Input Splitting
1*3
Output Splitting
3
Splitter
Input Splitting
4
Output Splitting
1*4
And
wideShape
true
Splitter
Input Splitting
16
Output Splitting
4
And
wideShape
true
inverterConfig
In_2
And
wideShape
true
XNOr
rotation
wideShape
true
And
wideShape
true