1 Sub Bits 32 And Bits 32 wideShape true Or Bits 32 wideShape true XOr Bits 32 wideShape true In Label a Bits 32 In Label b Bits 32 multiply-add.dig In Label c Bits 32 Neg Bits 32 Out Label Z Splitter Input Splitting 32 Output Splitting 31,1 Out Label N Add Bits 32 XOr Out Label V Multiplexer Selector Bits 3 Bits 32 Multiplexer Selector Bits 3 Const Value 0 Out Label u0 Bits 32 Out Label u1 Bits 32 Out Label C_o Tunnel NetName sel Tunnel NetName sel In Label C_i Splitter rotation Input Splitting 32 Output Splitting 31,1 Splitter rotation Input Splitting 32 Output Splitting 31,1 Splitter Input Splitting 32 Output Splitting 5 And XNOr rotation And nor32.dig nor32.dig shift32.dig Text Description ALU Opcode 0000 -> ADD 0001 -> SUB 0010 -> MADUU 0011 -> MADSS 0100 -> AND 0101 -> OR 0110 -> XOR 0111 -> NEG 1000 -> LSL 1001 -> LSR 1010 -> SCL 1011 -> SCR 1100 -> ROL 1101 -> ROR 1110 -> ASR 1111 -> MADSU In Label OP Bits 4 Splitter Input Splitting 4 Output Splitting 1*4 Tunnel NetName mad_s Tunnel NetName shift_op Tunnel rotation NetName shift_op Tunnel rotation NetName mad_s Tunnel NetName long_z Multiplexer Tunnel NetName long_z Tunnel NetName sel XOr Out Label S LookUpTable Bits 3 Inputs 4 Data 0,1,2,2,3,4,5,6,7*7,2 LookUpTable Bits 3 Data 9*0,1,2,3,4,5,6 Inputs 4 LookUpTable Inputs 4 Data 0,0,1,1,11*0,1 Splitter Input Splitting 2 Output Splitting 1,1 LookUpTable Bits 2 Data 0,0,0,3,11*0,2 Inputs 4