From 74795f7ca520f0aba0ad98c4a54f26bc3261c8ea Mon Sep 17 00:00:00 2001
From: Alessandro Mauri <alemauri001@gmail.com>
Date: Sun, 30 Oct 2022 00:05:19 +0200
Subject: [PATCH] Sun Oct 30 12:05:19 AM CEST 2022

---
 INSTRUCTIONS.md | 90 ++++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 82 insertions(+), 8 deletions(-)

diff --git a/INSTRUCTIONS.md b/INSTRUCTIONS.md
index bc6d726..c76f689 100644
--- a/INSTRUCTIONS.md
+++ b/INSTRUCTIONS.md
@@ -5,11 +5,85 @@ the combined functions of conventional risc instuctions.
 
 as such most instructions could be pipelined, I don't know how to feel about that
 
-| mnemonic   | function       | opcode |
-|------------|----------------|--------|
-| Arithmetic |                |        |
-|------------|----------------|--------|
-| Memory     |                |        |
-|------------|----------------|--------|
-| LD Rd, Ra:Rb|
-| ST         |
+# Memory Operations
+when accessing memory trough an address a consecutive pair of registers is used,
+each consecutive pair of registers is given a name, for brevity a pair is 
+always referred to as `A`. The possible pairs are:
+
+- A = R1:R0
+- B = R3:R2
+- C = R5:R4
+- D = R7:R6
+- E = R9:R8
+- F = R11:R10
+- G = R13:R12
+- H = R15:R14
+- I = R17:R16
+- J = R19:R18
+- K = R21:R20
+- L = R23:R22
+- M = R25:R24
+- N = R27:R26
+- O = R29:R28
+- P = R31:R30
+
+
+## LD load value into register
+normal loading
+syntax: `LD Rd, A`
+action: `Rd = [A]`
+
+post increment/decrement
+syntax: `LD Rd, A+q`
+action: `Rd = [A]; A += q`
+
+pre increment/decrement
+syntax: `LD Rd, q+A`
+action: `A += q; Rd = [A]`
+
+## LDI load immediate into register
+syntax: `LDI Rd, imm`
+action: `Rd = imm`
+
+## LDIL load long immediate into register
+syntax: `LDIL Rd, imm32`
+action: `Rd = imm32`
+
+## ST store value from register
+normal storing
+syntax: `ST A, Rd`
+action: `[A] = Rd`
+
+post increment/decrement
+syntax: `ST A+q, Rd`
+action: `[A] = Rd; A += q`
+
+pre increment/decrement
+syntax: `ST q+A, Rd`
+action: `A += q; [A] = Rd`
+
+## STI store immediate into memory
+normal store
+syntax: `STI A, imm` 
+action: `[A] = imm`
+
+post increment/decrement
+syntax: `STI A+q, imm`
+action: `[A] = imm; A += q`
+
+pre increment/decrement
+syntax: `STI q+A, imm`
+action: `A += q; [A] = imm`
+
+## STIL store long immediate into memory
+normal store
+syntax: `STIL A, imm32` 
+action: `[A] = imm32`
+
+post increment/decrement
+syntax: `STIL A+q, imm32`
+action: `[A] = imm32; A += q`
+
+pre increment/decrement
+syntax: `STIL q+A, imm32`
+action: `A += q; [A] = imm32`